IPTR-DSPBUILDER【PDF 395/404 页】DSP BUILDER SOFTWARE

您好，
买卖IC网欢迎您。
请登录
免费注册

391页 392页 393页 394页 [395页]396页 397页 398页 399页

Index

Symbols

.hex file 12–2

.mdl file 1–2

.mdlxml file 12–1

.qar file 12–1

.qip file 12–2

A

Advanced blockset interoperability 1–3

AltBus block 19–1

alt_dspbuilder_createComponentLibrary

Create component library command 10–6

alt_dspbuilder_exportHDL command 12–3

alt_dspbuilder_refresh_hdlimport

Update HDL command 3–26

alt_dspbuilder_refresh_megacore

Update MegaCore command 4–2

alt_dspbuilder_refresh_user_library_blocks

Update user libraries command 9–6

alt_dspbuilder_setup_megacore

Setup MegaCore command 4–1

alt_dspbuilder_verifymodel

Comparision command 3–23

Altera Quartus II software 1–1

Integration with MATLAB 1–2

AltLab library 14–1

Arithmetic library 15–1

asynchronous clear signal

wiring 13–6

Automatic flow 3–20

Avalon-MM interface

Features 1–2

FIFO walkthrough 7–16

Interface blocks walkthrough 7–8

Master block 7–4

Read FIFO 7–7

Slave block 7–2

SOPC Builder integration 7–1

Write FIFO 7–6

Avalon-MM Master block 18–2

Avalon-MM Read FIFO block 18–7

Avalon-MM Slave block 18–4

Avalon-MM Write FIFO block 18–9

Avalon-ST interface

Features 1–2

Packet Format Converter 7–22

Packet formats 7–21

SOPC Builder integration 7–19

Avalon-ST Packet Format Converter block 18–11

Avalon-ST Sink block 18–17

Avalon-ST Source block 18–18

B

Barrel Shifter block 15–1

Binary Point Casting block 19–4

Binary to Seven Segments block 17–1

Bit Level Sum of Products block 15–3

Bit width design rule 3–4

Bitwise Logical Bus Operator block 17–3

Black box 3–22

Explicit 8–1

HDL import

Walkthrough 8–1

Implicit 8–1

Subsystem Builder

Walkthrough 8–6

Using HDL import 8–1

Using SubSystem Builder 8–1

Boards library 24–1

Bus Builder block 19–5

Bus Concatenation block 19–7

Bus Conversion block 19–8

Bus Probe (BP) block 14–1

Bus Splitter block 19–9

Butterfly block 16–1

C

Case Statement block 17–4

Clock

Setting a derived clock 2–2

Setting the base clock 2–2

Clock block 14–2

Clock_Derived block 14–3

Clocking 3–8

Assignment 3–11

Categories 3–11

Clock enable signal 3–8

Configuration parameters 2–3

Global reset 3–17

HDL simulation models 3–16

Multiple clock domains 3–9

Sampling period 3–9

Simulink simulation model 3–16

Single clock domain 3–8

Timing relationships 3–18

Using a PLL block 3–14

November 2013

Altera Corporation

DSP Builder Handbook

Volume 2: DSP Builder Standard Blockset

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

我的联系方式

*

*

*

相关PDF资料

IR11662SPBF IC CNTROL SMART RECTIFIER 8-SOIC

IR1166STRPBF IC MOSFET DRIVER N-CH 200V 8SOIC

IR11672ASPBF IC MOSFET DRIVER 200V 8-SOIC

IR1167ASTRPBF IC SMART SECONDARY DRIVER 8-SOIC

IR11682STRPBF IC MOSFET DRIVER DUAL 200V 8SOIC

IR1168SPBF IC MOSFET DRIVER DUAL 200V 8SOIC

IR1176STR IC DRIVER RECT SYNC 5V 4A 20SSOP

IR2010SPBF IC DRIVER HIGH/LOW SIDE 16SOIC

相关代理商/技术参数

IP-TRIETHERNET 功能描述:开发软件 Triple Spd Ethernet MegaCore RoHS:否制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors

IP-TRIETHERNETF 功能描述:开发软件 3x Spd Ethernet MAC MegaCore RoHS:否制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors

IPTV-OPTION-INS970 制造商:3M Electronic Products Division 功能描述:IPTV OPTION FOR INS970

IPU039N03L G 功能描述:MOSFET N-CH 30V 50A 3.9mOhms RoHS:否制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube

IPU039N03LG 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:OptiMOS?3 Power-Transistor Features Fast switching MOSFET for SMPS

IPU039N03LGXK 制造商:Infineon Technologies AG 功能描述:Trans MOSFET N-CH 30V 50A 3-Pin(3+Tab) TO-251

IPU04N03LA 功能描述:MOSFET N-CH 25V 50A IPAK RoHS:否类别:分离式半导体产品 >> FET - 单系列:OptiMOS™ 标准包装:1,000 系列:MESH OVERLAY™ FET 型:MOSFET N 通道，金属氧化物 FET 特点:逻辑电平门漏极至源极电压(Vdss):200V 电流 - 连续漏极(Id) @ 25° C:18A 开态Rds（最大）@ Id, Vgs @ 25° C:180 毫欧 @ 9A，10V Id 时的 Vgs(th)（最大）:4V @ 250µA 闸电荷(Qg) @ Vgs:72nC @ 10V 输入电容 (Ciss) @ Vds:1560pF @ 25V 功率 - 最大:40W 安装类型:通孔封装/外壳:TO-220-3 整包供应商设备封装:TO-220FP 包装:管件

IPU04N03LA G 功能描述:MOSFET N-CH 25V 50A IPAK RoHS:是类别:分离式半导体产品 >> FET - 单系列:OptiMOS™ 标准包装:1,000 系列:MESH OVERLAY™ FET 型:MOSFET N 通道，金属氧化物 FET 特点:逻辑电平门漏极至源极电压(Vdss):200V 电流 - 连续漏极(Id) @ 25° C:18A 开态Rds（最大）@ Id, Vgs @ 25° C:180 毫欧 @ 9A，10V Id 时的 Vgs(th)（最大）:4V @ 250µA 闸电荷(Qg) @ Vgs:72nC @ 10V 输入电容 (Ciss) @ Vds:1560pF @ 25V 功率 - 最大:40W 安装类型:通孔封装/外壳:TO-220-3 整包供应商设备封装:TO-220FP 包装:管件